IBM’s R&D Partnering Model — up close and personal

Summary : The Chip Insider's Cook’s Tour: A deep immersion course in what IBM was doing in 2008 at both Albany Nanotech and at IBM’s Fishkill facility is reviewed by VLSIresearch's Chip Insider in this 2008 article.

Annexure :

The Cook’s Tour: A deep immersion course in what IBM was doing in 2008 at both Albany Nanotech and at IBM’s Fishkill facility is reviewed by VLSIresearch's Chip Insider in this 2008 article.This Cook’s Tour showed the millions in R&D costs being saved by semiconductor companies when choosing partnerships over going it alone in developing leading-edge semiconductor processes for wafer fabs. IBM’s R&D partnering model is the most significant new private R&D model to emerge since the last World War. It started in 1988, almost 20 years ago with Siemens and Toshiba in an effort to develop DRAMs. Since then it has blossomed as one of the most important ways to defray rapidly escalating R&D costs. Back in the late eighties, it cost about a billion dollars to develop a DRAM process. Since these were commodities anyway, it made sense to compress what would have been a $3B tab into one. The only real issue was could they really work together: three different companies and three dramatically different cultures. They did make it work and today, IBM’s R&D partnering model has become the gold standard. They’ve managed to attract some of the best and even some of the strongest companies to participate in applied research that now stretches all the way to manufacturing with their Common Platform alliance. Its members include AMD, Chartered Semiconductor, Freescale, Infineon, Samsung, Sony, not to mention the State of New York. One fact speaks volumes about the breadth of this alliance: that the cumulative sum of capital expenditures for all the partners accounts for almost half of the world’s total.

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