Open ATE Architectures versus Multiple Test Platforms

Summary : Mark Jagiela, President of Teradyne's Semiconductor ATE Group, on the question of the benefits of Multiple Test Platforms over Open Architectures for semiconductor companies testing of ICs. The semiconductor industry had put together a consortia to promote an Open Architecture to its test equipment supply base. It failed. In this historic video from 2003, Mark examines the benefits of the competing approaches. Semiconductor History being made in the 2000’s.

You may like this also:

Mark Jagiela
Consolidation in the AT ...
12 Aug 2003
Consolidation in the AT ...

Mark Jagiela, President of Teradyne's Semiconductor ATE Group, on consolidation ...

Mark Jagiela, President of Teradyne's Semiconductor ATE Group, on consolidation in the semiconductor test equipment industry, answering the question of why IC tester companies don't die. Semiconductor History b ... See more

Mark Jagiela
The Move to an Open Arc ...
12 Aug 2003
The Move to an Open Arc ...

Mark Jagiela, President of Teradyne's Semiconductor ATE Group, on what will be t ...

Mark Jagiela, President of Teradyne's Semiconductor ATE Group, on what will be the prevailing tester architecture. Semiconductor History being made in the 2000’s: a historic video from 2003. ... See more

Mark Jagiela
Is it possible to have ...
12 Aug 2003
Is it possible to have ...

Mark Jagiela, President of Teradyne Semi Group, on... Is it possible to have a n ...

Mark Jagiela, President of Teradyne Semi Group, on... Is it possible to have a non-partisan consortium? ... See more

Mark Jagiela
Teradyne joining consor ...
12 Aug 2003
Teradyne joining consor ...

Mark Jagiela, President of Teradyne Semi Group, on... Teradyne joining consortiu ...

Mark Jagiela, President of Teradyne Semi Group, on... Teradyne joining consortium? ... See more

Mark Bohr
Intel at 90nm | The Chi ...
09 Dec 2002
Intel at 90nm | The Chi ...

Mark Bohr, Intel Fellow, Director of Process Architecture and Integration discus ...

Mark Bohr, Intel Fellow, Director of Process Architecture and Integration discusses the launch of Intel's then new P1262 90nm Process in this historic interview. In 2002, 90nm was the cutting edge of semiconduc ... See more

Art Zafiropoulo
Art Zafiropoulo and his ...
29 Nov 2004
Art Zafiropoulo and his ...

Art Zafiropoulo was honored for championing technology through innovative market ...

Art Zafiropoulo was honored for championing technology through innovative marketing approaches: first with plasma etching and later with “mix and match” lithographic manufacturing strategies. ... See more

Bill Holt
Decision Making at Inte ...
21 Jan 2008
Decision Making at Inte ...

Bill Holt on Business Incentives for Semiconductor R&D

Bill Holt on Business Incentives for Semiconductor R&D ... See more

Mihir Parikh
Mihir on the History of ...
13 Aug 2008
Mihir on the History of ...

Mihir on the History of Automation in the Semiconductor Industry

Mihir on the History of Automation in the Semiconductor Industry ... See more

Yan Borodovsky
Yan Borodovsky on DFM a ...
13 Sep 2007
Yan Borodovsky on DFM a ...

Yan Borodovsky discusses DFM and Computational Lithography at Intel in historic ...

Yan Borodovsky discusses DFM and Computational Lithography at Intel in historic 2007 interview. He covers what it’s about and how it’s a Chip Making Revolution ... See more

D. Edenfeld
Test Panel: D. Edenfeld ...
29 Mar 2005
Test Panel: D. Edenfeld ...

Test Panel: D. Edenfeld, Intel on... Open Architecture

Test Panel: D. Edenfeld, Intel on... Open Architecture ... See more
  • Facebook Logo
  • Twitter Logo
  • Linkdin Logo
  • Youtube Logo

Access to and use of this Website is subject to TechInsights' Terms of Use (including Copyright Policy & Claims) and Privacy Policy. By accessing or using this Website you agree to TechInsights' Terms of Use (including Copyright Policy & Claims) and Privacy Policy.

Copyright © 2026 TechInsights Inc. All rights reserved.